000			01102nam a2200253 a 4500
001			2471
003			Q Series
005			20170516135427.0
008			040608s2003 njua 001 0 eng d
020			_a0130891614
040			_aDLC _cAUA _dAUA _a
100	1		_aCiletti, Michael D.
245	1	0	_aAdvanced digital design with the Verilog HDL / _cby Michael D. Ciletti.
250			_a1st ed.
260			_aUpper Saddle River, N.J. : _bPrentice Hall, _c2003.
300			_axxi, 982 p. : _bill. ; _c24 cm. + _e1 CD-ROM (4 3/4 in.)
440		0	_aPrentice Hall Xilinx Design Series.
504			_aIncludes bibliographical references and index.
500			_aIncludes CD-ROM : "Silos 2001, Verilog HDL logic simulator for Advanced digital design with the Verilog HDL / by Michael D. Ciletti (AUA-PL-0016618)".
505	2		_aIntroduction to digital design methodology--Review of combinational logic design--Fundamentals of sequential logic design.
650		0	_aDigital electronics. _937
650		0	_aLogic circuits _xComputer-aided design.
650		0	_aVerilog (Computer hardware description language).
999			_c381428 _d381428